In radio base stations and other systems, power amplifiers are often used to amplify wideband signals or signal combinations with high peak to average power ratio (PAR or PAPR). The amplifiers must then be able to repeatedly output very high power for very short periods, even though the bulk of the output power is generated at the much lower average power level. In systems with random phase combinations of many signals (without any dominating ones) the amplitude of the signal follows a Rayleigh distribution.
A conventional single-transistor power amplifier (for example a class B, AB or F power amplifier) has a fixed radio frequency (RF) load resistance and a fixed voltage supply. The bias in class B or AB amplifiers causes the output current to have a form close to that of a pulse train of half wave rectified sinusoid current pulses. The direct current (DC) current (and hence DC power) is therefore largely proportional to the RF output current amplitude (and voltage). The output power, however, is proportional to the RF output current squared. The efficiency, i.e. output power divided by DC power, is therefore also proportional to the output amplitude. The average efficiency of a power amplifier is consequently low when amplifying signals that on average have a low output amplitude (or power) compared to the maximum required output amplitude (or power), i.e. high PAR.
A Chireix amplifier (as described in “High power outphasing modulation,” Proc. IRE, vol. 23, no. 11, pp. 1370-1392, November 1935, by H Chireix), or a Doherty amplifier (as described in “A new high efficiency power amplifier for modulated waves”, by W. H. Doherty, Proc. IRE, vol. 24, no. 9, pp. 1163-1182, September 1936) were the first examples of amplifiers based on multiple transistors with passive output network interaction and combination.
They have high average efficiency for amplitude-modulated signals with high peak-to-average ratio (PAR) since they have a much lower average sum of RF output current magnitudes from the transistors at low amplitudes. This causes high average efficiency since the DC currents drawn by the transistors are largely proportional to the RF current magnitudes.
The RF output current from the “peaking” sub-amplifier in the Doherty amplifier needs to rise linearly from zero at a “transition point” to full current at full amplitude. The “main” sub-amplifier has an entirely linear output current. The sum of the amplitudes of these currents deviates far from the ideal parabolic shape (of a constant efficiency amplifier), so the dip in efficiency in the upper amplitude region is quite substantial. Another way to intuitively get to the same result is to observe that the RF voltage at the peaking sub-amplifier is only medium high at the transition point, so the output current pulses will here experience large voltage drop across the transistor.
The Chireix amplifier has high efficiency in the upper amplitude region, since both sub-amplifier RF voltage amplitudes are high, and close in phase with the respective RF currents. Since variations in output amplitude are accompanied by phase shifts in the sub-amplifier RF voltages this operation mode is called “outphasing”. In the outphasing region, the current pulses experience low voltage drop across the transistors. The RF current increase at the transition point is very gradual, and the overall shape of the sum of RF current amplitudes is much closer to the ideal parabolic shape than for the Doherty amplifier. The drawback of having both RF voltages high is that the efficiency of the amplifier is degraded by shunt loss, i.e. loss that behaves like a resistor coupled from the transistor output to ground (RF wise). With low loss transistors, Chireix outphasing is very efficient.
Earlier patent applications WO 2004/023647 and WO 2004/057755 by the present applicant describe an expandable multi-amplifier (having 3 sub-amplifiers and higher) structures containing one or more Chireix stages. Earlier patent application WO 2010/074615, also by the present applicant, describes a family of “Quasi-Chireix” amplifiers that have very high efficiency in both 3 and 4-stage (and higher) variants.
A paper by D. J. Perreault entitled “A new power combining and outphasing modulation system for high-efficiency power amplification”, IEEE Proc. MWSCAS, 2010, pp. 441-444, describes hierarchic Chireix amplifiers that have higher efficiency than the 4-stage variants of WO 2004/023647 and WO 2010/074615 when very low loss transistors (specifically, low shunt loss) are employed. The amplifiers in the paper by Perreault only exist for 4, 8, 16 . . . etc. (powers of two) sub-amplifiers.
Earlier patent application WO 2013/087232, also by the present applicant as the present invention, describes asymmetric hierarchic Chireix amplifiers that can be used when other numbers of transistors are called for, such as 3, 5, 6, 7, 9 . . . etc. The “Chireix-Doherty” 3-stage amplifier of WO 2004/057755 has been improved for transistors with high shunt loss, and very much improved for having one transistor with very high loss, in co-pending application PCT/SE2013/050605 by the present applicant. The amplifier disclosed in co-pending application P42029 being filed con-currently herewith by the present applicant has the highest efficiency for moderate backoff levels.
The first Chireix-Doherty amplifiers of WO 2004/057755 and also the improved variant of co-pending application PCT/SE2013/050605 have a Chireix pair that is “outphasing” with very high efficiency in a middle amplitude region. In the upper amplitude region (its proportion determined by the size of the “peaking” sub-amplifier) they behave like the upper region in a Doherty amplifier, and are therefore sub-optimal when low shunt loss transistors are employed.
The amplifiers in WO 2010/074615 increased the proportion of outphasing behaviour, and exist in both 3-stage and 4-stage versions, but require different size sub-amplifiers and have slightly sub-optimal efficiency with very low-loss transistors.
The 4-stage amplifiers of Perreault are very close to optimal with very low-loss transistors, but do not exist for circuits having 3 sub-amplifier stages. The optimality also breaks down substantially if different size sub-amplifier pairs are employed.
The amplifiers in WO 2013/087232 exist in 3-stage versions with equal size sub-amplifiers, but have sub-optimal efficiency in a middle amplitude region when the lowermost transition point is placed at too low amplitude.